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Cadence announces expansion of its Tensilica IP portfolio

Cadence announces expansion of its Tensilica IP portfolio

Cadence has announced the expansion of its Tensilica IP portfolio, introducing four new digital signal processors to cater to the growing demand for enhanced performance and AI capabilities across various applications. The DSPs are based on the Tensilica Xtensa LX8 processor platform, which is a specific architecture, famous for its high performance and low power consumption capability.

The Xtensa LX8 processor platform comes equipped with native support for AMBA AXI (Advanced Microcontroller Bus Architecture Advanced eXtensible Interface), a standard interface facilitating communication between different components within a chip. This inherent support aims to ensure that the new DSPs can interact with other components effectively, leading to an overall enhancement in system performance. Additionally, the Xtensa LX8 incorporates an L2 cache, a memory type used to store frequently accessed data for quicker retrieval.

The Xtensa LX8 processor platform also integrates branch prediction, a microprocessor technique aimed at optimizing instruction execution by predicting the next branch of code to be executed. According to Cadence, the Xtensa LX8 can achieve a 5 to 20 percent reduction in the number of clock cycles required for executing operations.

“Designing with a system-level perspective is crucial, and these SoCs must be energy-efficient, flexible and future-proof to accommodate new neural networks. Cadence continues to make significant investments in our Tensilica product line, and our latest HiFi and Vision DSPs reflect that commitment,” says David Glasco, vice president of research and development for Tensilica IP at Cadence.

Two of the newly introduced DSPs are the Tensilica HiFi 1s and HiFi 5s, developed for the growing market demand for lightweight imaging and AI applications. Cadence emphasizes that original equipment manufacturers (OEMs) can integrate these DSPs into their products, achieving enhanced performance without the need for extensive optimization efforts. These enhancements include double precision floating point acceleration, hardware/software co-design capabilities, the introduction of new 8-bit operations, and the incorporation of an L2 cache.

The remaining two DSPs, the Vision 110 and Vision 130, are designed to handle sensor and AI workloads while upholding energy efficiency. Cadence asserts that these DSPs offer up to 20 percent increase in frequency, enabling them to operate at higher clock speeds. Furthermore, they deliver up to a twofold enhancement in 16-bit, 32-bit, and 64-bit floating point performance, making them suitable for a diverse range of computational tasks.

“We continue to use Cadence Tensilica Vision DSPs, which provide the computational throughput and flexibility needed to keep up with today’s complex AI workload requirements. Additionally, Tensilica’s extensive framework of software libraries and strong partner ecosystem enable rapid deployment for fast time to market,” says Albert Liu, chief executive officer at Kneron.

Cadence recently launched its next-generation AI IP and software tools in a bid to address the demand for on-device and edge AI processing.

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