MIPS onboards new leadership amidst company expansion

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MIPS onboards new leadership amidst company expansion

MIPS, a RISC-V compute intellectual property (IP) developer, has expanded its executive team by adding two semiconductor industry professionals. Drew Barbier joins as VP of products, while Brad Burgess assumes the role of chief architect.

Sameer Wasson, the CEO of MIPS, says: “Given Drew’s and Brad’s proven track records in the semiconductor IP space with a recent focus on RISC-V, I am confident in their abilities to help drive IP innovation and penetration into new markets.”

MIPS is also expanding its presence with new offices in Dallas and Austin, TX, while continuing to grow in San Jose, California and Bangalore, India. MIPS says it is focused on advancing RISC-V innovation to address the increasing need for adaptable, scalable and quickly deployable chip solutions.

Drew Barbier has fifteen years of semiconductor and IP product experience. He previously held the position of senior director of product management at SiFive for over six years. Before his tenure at SiFive, he held technical and product management positions at Faraday Technology Corporation, Arm and Analog Devices.

As MIPS continues expanding its presence in the automotive, cloud and embedded markets, Barbier will now drive its product roadmap.

“The need for RISC-V has never been greater, as heterogeneous compute requirements become increasingly complex,” Barbier says.

He looks forward to working with MIPS’ team to develop high-density compute solutions for MIPS customers.

Meanwhile, Brad Burgess has over three decades of semiconductor and RISC-V industry experience. His expertise lies in design, CPU architecture and his tenure as SiFive’s Chief CPU Architect. Brad has a track record of delivering high-volume products across various instruction sets, including RISC-V, ARM, 68K, PowerPC and x86.

As MIPS’ Chief Architect, Burgess oversees the technology architecture and development of new roadmap product designs.

According to Burgess, MIPS is positioned to meet companies’ growing computational demands.

“I am thrilled to join the expanding MIPS team and leverage my expertise to help drive company growth at a time when RISC-V is experiencing tremendous momentum and adoption,” Burgess adds.

The new MIPS executive leadership team will be at CES until January 12th, 2024, and will be available to meet with the media and the public. MIPS will showcase real-time system deployments at its Venetian Hotel suite and host an executive meet-and-greet event on Wednesday, January 10th.

MIPS creates RISC-V compute IP for diverse applications. The company says its customizable solutions empower semiconductor companies to meet performance and power needs.

Read more:

Arteris, SiFive design RISC-V processor IP for edge AI applications

UMC and partners targets edge AI with W2W 3D IC project launch

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